Semiconductor devices based on silicon carbide as the base material are continuously developed for use in connection with high temperatures, high power applications and under high radiation conditions. Under such circumstances conventional semiconductors do not work satisfactorily. Evaluations indicate that SiC semiconductors of power MISFET-type and diode rectifiers based on SiC are able to operate over a greater voltage and temperature interval, e.g. up to 650-800.degree. C., and show better switching properties such as lower losses and higher working frequencies and nevertheless have a volume 20 times smaller than corresponding silicon devices. These possible improvements are based on the favorable material properties that silicon carbide possesses in relation to silicon, such as, for example a higher breakdown field (up to 10 times higher than silicon), a higher thermal conductivity (more than 3 times higher than silicon) and a higher energy band gap (2.86 eV for 6H--SiC, one of the crystal structures of SiC).
SiC semiconductor technology is relatively new and in many aspects immature. There are many critical manufacturing problems that need to be solved before SiC semiconductor devices may be realized experimentally and large scale manufacturing becomes a reality. This is especially true of devices intended for use in high-power and high-voltage applications.
One of the difficulties to overcome when manufacturing high voltage diodes or other types of semiconductor devices comprising a voltage absorbing pn junction is to produce a proper junction termination at the edge of the junction. The electric field at the periphery of the junction is normally enhanced compared to the electric field in the bulk of the junction. This field increase at the periphery of the junction may be further reinforced in the presence of surface charge. A high electric field at the edge of the pn junction results in a great risk of voltage breakdown or flash-over at the edge of the junction and gives rise to an instability of the blocking voltage known as voltage drift.
To avoid the above-mentioned disadvantages it becomes very important to reduce the field concentration where the junction reaches the surface. Combined with efforts to passivate the surface of the device, measures are taken to flatten the electric field at the surface e.g. by influencing how the pn junction emerges at the surface. As an example, it is known from silicon power devices to lap (grind, sandblast, etch) the surface of the edge to a certain angle in relation to the pn junction to thereby flatten the field. Another known technique is to gradually decrease the charge content on the highly doped side of the junction, in such a way that the charge content of the highly doped layer is reduced towards the outermost edge of the junction, a so called Junction Termination Extension, (JTE). The methods, known from silicon technology, used to achieve a JTE of an Si device cannot always be directly transferred to devices with SiC as the base material, primarily due to the great hardness of SiC and extremely low diffusivity of proper SiC dopants. Ion implantation of doping elements, a common technique used in manufacturing Si devices, is difficult to master and not yet fully developed for SiC but is still perhaps the most promising method for doping of SiC. However, ion implantation introduces damage to the SiC crystal, which is a factor to be considered.
High voltage diodes from 6H--SiC with epitaxially formed pn and Schottky junctions have been made experimentally (see e.g. M. Bhatnagar and B. J. Baliga, IEEE Trans. Electron Devices, Vol. 40, No. 3 pp 645-655, March 1993 or P. G. Neudeck, D. J. Larkin, J. A. Powell, L. G. Matus and C. S. Salupo, Appl. Phys. Lett. Vol 64, No 11, Mar. 14, 1994, pp 1386-1388). Some of the problems related to SiC devices have thus been solved, but no reliable solution to the problems connected with electric field concentration at the edges of the junction has been presented as yet.
Any method or device to accomplish a semiconductor device corresponding to the principle of Junction Termination Extension at a pn junction composed of Si is not known for a device, where SiC constitutes the base material of the junction. Solutions for arriving at SiC devices comprising pn junctions with planar JTEs are described in the unpublished patent application U.S. 08/683 059, which is hereby included in this description by reference. The solutions described there involve stepwise decreasing charges of the JTE towards the edge by ion implantation of concentric regions, also called zones, of the JTE in order to control the surface doping and surface fields. A consecutive passivating layer has to be grown or deposited on a surface which is structurally damaged by the ion implantation.